FPGA & Embedded Systems in the Age of AI

Most FPGA books teach a language. This one teaches the job.

Starting from a switch and a gate, Adam Taylor builds the whole discipline in order: registers, state machines and the fabric that holds them; requirements, architecture, VHDL and SystemVerilog for synthesis, clocks and resets, timing closure, AXI, off-chip interfaces, simulation and the Vivado build; fixed-point numbers, sampling, filters, the FFT and choosing a device; MicroBlaze, Zynq, embedded vision, mixed-signal, HLS and Versal, security; verification frameworks, coverage and formal; and finally the bench - power-on, the ladder of bitstreams, the ILA, the test report.

The thread through all of it is one design. The Explorer Vision Node grows chapter by chapter from a blinking LED into a MIPI camera pipeline, a 16-bit ADC signal chain with a 1024-point FFT, a MicroBlaze V control plane, AES-GCM authenticated UDP and a watchdog, with a self-checking testbench, a golden model and a lab for every block. Every chapter gives a page of explanation and a worked example with the numbers done by hand - the clock-by-clock AXI write, the FIFO that overflowed, the 8b/10b constant that six reviewers missed - and 35 timing diagrams drawn from the actual signals.

The last chapter is the only one about AI. It uses everything before it to put a generated block through the same harness as a human's: specify, review, lint, simulate under back-pressure, synthesise, fix. The block fails at byte 9. Knowing why is the point of the book.

Written for new graduates and anyone moving into FPGA work, in the plain, practical voice of the MicroZed Chronicles. Labs run on the Adiuvo Explorer (Artix UltraScale+) board with free tools; sources, testbenches and figures are on GitHub.