{"product_id":"other-example-product-4","title":"Astria \u0026 RPI 2040","description":"\u003cp\u003eThe board has been designed to support a range of developments from simple logic and embedded system development, to more complex solutions such as image processing.\u003c\/p\u003e\n\u003cp\u003eKEY FEATURES\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003eAMD Spartan 7 XC7S6 with 6000 logic cells, 5 BRAM, 2 CMT, 10 DSP48\u003c\/li\u003e\n\u003cli\u003eRaspberry PI RP2040 processor providing dual-core Arm M0+ cores running at 133 MHz.\u003c\/li\u003e\n\u003cli\u003eFTDI232H - For JTAG Programming \u003c\/li\u003e\n\u003cli\u003eSDRAM - 64 MBit \u003c\/li\u003e\n\u003cli\u003e4 Pmod  - Three for FPGA, one for RPi 2040 - Ability to fit high speed LVDS transceiver on one FPGA Pmod\u003c\/li\u003e\n\u003cli\u003eUser Flash - connected to FPGA 32 MBit QSPI\u003c\/li\u003e\n\u003cli\u003eFPGA Configuration PROM 256MBit \u003c\/li\u003e\n\u003cli\u003eFour User LEDs\u003c\/li\u003e\n\u003cli\u003eFour push button switches\u003c\/li\u003e\n\u003cli\u003eFour SPST switches\u003c\/li\u003e\n\u003cli\u003e100 MHz Reference clock \u003c\/li\u003e\n\u003c\/ul\u003e\n\u003cp\u003eREFERENCES\u003c\/p\u003e\n\u003cp\u003eReference Designs, XDC, Schematics, Vivado board definition can be found\u003cspan\u003e \u003c\/span\u003e\u003ca href=\"https:\/\/bitbucket.org\/adiuvo-engineering\/leonidas_embedded_development\/src\/main\/\" target=\"_blank\"\u003e\u003cspan\u003ehere\u003c\/span\u003e\u003c\/a\u003e\u003c\/p\u003e\n\u003cp\u003eAPPLICATION EXAMPLES INCLUDE\u003c\/p\u003e\n\u003cul\u003e\n\u003cli\u003e\n\u003cstrong\u003eRPI_FPGA_UART_AXI \u003c\/strong\u003e\u003cem\u003eVivado 2023.2\u003c\/em\u003e\u003cspan\u003e \u003c\/span\u003e Configures a UART in the RP2040 to communicate with the FPGA, sending a protocol over the UART and IP in the FPGA AXI peripherals can be accessed and controlled. In this version three AXI GPIO are connected to three LEDS, the final LED is connected to a AXI timer to demonstrate PWM on the LED. The 4 slide switches are also connected to the AXI GPIO to enable their status to be read over the AXI GPIO. Refer to project here for detials on protocol\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eSDRAM \u003c\/strong\u003e\u003cem\u003eVivado 2023.2\u003cspan\u003e \u003c\/span\u003e\u003c\/em\u003e- SDRAM example for the SDRAM on the board.\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eMBV_MCS\u003cspan\u003e \u003c\/span\u003e\u003c\/strong\u003e\u003cem\u003eVivado \u0026amp; Vitis 2024.1\u003c\/em\u003e\u003cspan\u003e \u003c\/span\u003eMicroBlaze V (RISC-V) MicroController System implemented on the Spartan 7 see blog\u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eS7_LEO \u003c\/strong\u003e \u003cem\u003eVivado 2023.2\u003c\/em\u003e\u003cspan\u003e \u003c\/span\u003eIO check of all FPGA PMOD IO and 4 LED, walks a LED around all 28 LEDS (4 on board, 24 on Pmod LED - not included) - also connects through the user flash to the RPI for testing \u003c\/li\u003e\n\u003cli\u003e\n\u003cstrong\u003eDELTA_SIGMA \u003c\/strong\u003e\u003cem\u003eVivado 2024.1\u003c\/em\u003e\u003cspan\u003e \u003c\/span\u003eDelta Sigma output at 1KHz on PMod 1 pin 1, PWM Sine output at 1 KHz on Pmod 1 pin 2, - external RC needed for recovery\u003c\/li\u003e\n\u003c\/ul\u003e\n\u003cp\u003eLEARN MORE ABOUT THE BOARD IN THESE BLOGS\u003c\/p\u003e\n\u003cp\u003e\u003ca href=\"https:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-leonidas-board\" target=\"_blank\"\u003ehttps:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-leonidas-board\u003c\/a\u003e\u003c\/p\u003e\n\u003cp\u003e\u003ca href=\"https:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-spartan-7-and-axi-over-uart\" target=\"_blank\"\u003ehttps:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-spartan-7-and-axi-over-uart\u003c\/a\u003e\u003c\/p\u003e\n\u003cp\u003e\u003ca href=\"https:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-microblaze-v-mcs\" target=\"_blank\"\u003ehttps:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-microblaze-v-mcs\u003c\/a\u003e\u003c\/p\u003e\n\u003cp\u003e\u003ca href=\"https:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-vivado-board-definitions\" target=\"_blank\"\u003ehttps:\/\/www.adiuvoengineering.com\/post\/microzed-chronicles-vivado-board-definitions\u003c\/a\u003e\u003c\/p\u003e","brand":"My Store","offers":[{"title":"Default Title","offer_id":59740575859022,"sku":null,"price":100.0,"currency_code":"GBP","in_stock":true}],"thumbnail_url":"\/\/cdn.shopify.com\/s\/files\/1\/1039\/9619\/5150\/files\/efcde7_cfec9e12a3a540259615e0063df0c86b_mv2.avif?v=1779712213","url":"https:\/\/merch.fpgahorizons.com\/products\/other-example-product-4","provider":"FPGA Horizons: Merch","version":"1.0","type":"link"}